IP library
Control Loop PHYPhotonic-Electronic InterfaceIn development
MRM Control Loop PHY
Low-noise, low-power optical control loop with high-resolution ADCs, DACs, and digital control.
Complete micro-ring modulator control loop PHY for wavelength stabilization, thermal tuning, and optical power control on monolithic silicon photonic platforms. The IP integrates high-resolution ADCs and DACs, digital control logic, and a customizable loop filter with configurable gain for application-specific optimization. Architected for low noise and low power operation as a foundational block in electro-photonic transceiver and WDM systems.
Features
- High-resolution ADCs and DACs
- Digital control and customizable loop filter
- Configurable gain
- Low noise, low power architecture
- GlobalFoundries Fotonix™ process (45SPCLO)
- Under active development
Applications
Wavelength stabilizationThermal tuning of micro-ring modulatorsOptical power controlWDM system integrationElectro-photonic transceivers
Process
GF Fotonix™ (45SPCLO)
Deliverables
- GDS layout database
- Liberty timing models (.lib)
- LEF layout exchange format
- Documentation available
- Integration support package
- Schematics available